One of the techniques that has been under development to improve transistor mobility is strained silicon. Typically the silicon layer is put under tensile stress to improve the N channel mobility. This has been extended to using an interlayer dielectric (ILD), a dielectric layer between conductive layers, that is under a selected stress to improve transistor performance. For N channel transistors this has meant using tensile stress, and for P channel transistors this has meant using compressive stress.